OpenFire - Revision history

imported>Matthazinski: Featured content category added

2013-02-03T01:25:29Z

imported>Cov at 11:39, 9 May 2012

2012-05-09T11:39:15Z

imported>Cov: Created page with "The '''OpenFire Processor Core''' is an libre-licensed soft-microprocessor originally written by Stephen Craven and improved upon by Alex Marschner. It is written in V..."

2012-05-09T11:34:20Z

Created page with "The '''OpenFire Processor Core''' is an libre-licensed soft-microprocessor originally written by Stephen Craven and improved upon by Alex Marschner. It is written in V..."

New page

The '''OpenFire Processor Core''' is an libre-licensed soft-microprocessor originally written by [[Stephen Craven]] and improved upon by [[Alex Marschner]]. It is written in Verilog and is binary-compatible with Xilinx's proprietary MicroBlaze soft-processor. The OpenFire was created to facilitate research on single chip, multiple processor configurations and application-specific instruction sets. The OpenFire core is released under the MIT license.

The OpenFire core can operate at 50MHz and has 8 output ports and 8 input ports. It features on-chip peripheral bus support and directly uses BRAM, eliminating the latency of the local memory bus. Version 0.6a was released on December 12th, 2007.

==External Links==
* [http://opencores.org/project,openfire_core,overview OpenCores Page]

[[Category:Libre projects]]

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−	The '''OpenFire Processor Core''' is an libre-licensed soft-microprocessor originally written by [[Stephen Craven]] and improved upon by [[Alex Marschner]]. It is written in Verilog and is binary-compatible with Xilinx's proprietary MicroBlaze soft-processor. The OpenFire was created to facilitate research on single chip, multiple processor configurations and application-specific instruction sets. The OpenFire core is released under the MIT license.	+	The '''OpenFire Processor Core''' is an libre-licensed soft-microprocessor originally written by [[Stephen Craven]] and improved upon by [[Alex Marschner]] PhD and masters students, respectively, of the [[Configurable Computing Lab]]. It is written in Verilog and is binary-compatible with Xilinx's proprietary MicroBlaze soft-processor. The OpenFire was created to facilitate research on single chip, multiple processor configurations and application-specific instruction sets. The OpenFire core is released under the MIT license.

	The OpenFire core can operate at 50MHz and has 8 output ports and 8 input ports. It features on-chip peripheral bus support and directly uses BRAM, eliminating the latency of the local memory bus. Version 0.6a was released on December 12th, 2007.		The OpenFire core can operate at 50MHz and has 8 output ports and 8 input ports. It features on-chip peripheral bus support and directly uses BRAM, eliminating the latency of the local memory bus. Version 0.6a was released on December 12th, 2007.